1. Field of the Invention
The present invention relates to a semiconductor nonvolatile storage device in which data can be electrically erased or written.
2. Description of the Related Art
In a usual semiconductor nonvolatile storage device, an EEPROM will be described below as an example by referring to the drawings.
FIG. 23 shows a block diagram of a usual EEPROM (semiconductor nonvolatile storage device) which decreases time necessary for wiring data from a host device. FIG. 24 shows a threshold voltage distribution diagram in the erasing state and the writing state of the usual EEPROM (semiconductor nonvolatile storage device).
As shown in FIG. 23, a structure including an interface circuit 101 for an EEPROM, an EEPREOM 1400, an interface circuit 1301 for a SRAM and a SRAM 1300 is employed as one example of a structure for shortening the time necessary for writing data from the host device.
In FIG. 23, the EEPROM 1400 includes a memory cell transistor array 110, a sense amplify circuit 120, a write data latch circuit 130, an address decoder circuit 140, a high voltage control circuit 150 and a control circuit 160. The SRAM 1300 includes a memory cell transistor array 1310, a sense amplify circuit 1320, an address decoder circuit 1340 and a control circuit 1360.
Now, a writing operation in the EEPROM 1400 will be described below.
For a writing instruction from the host device, data is temporarily written at high speed in the SRAM 1300 through the interface circuit 1301 for the SRAM. After the writing instruction from the host device is completed, the data stored in the SRAM 1300 is written in the EEPROM 1400 through the interface circuit 1301 for the SRAM and the interface circuit 101 for the EEPROM. The SRAM 1300 and the EEPROM have usual ordinary structures.
In order to read the data of the SRAM 1300 for a reading instruction from the host device, the data is read through the interface circuit 1301 for the SRAM. Similarly, in order to read the data of the EEPROM 1400, the data is read through the interface circuit 101 for the EEPROM.
In accordance with these operations, after the data is temporarily written in the SRAM 1300 at high speed upon writing the data, the data is written in the EEPROM 1400 so that the nonvolatile characteristics of the stored data are realized. (for instance, see Patent Document 1.).
[Patent Document 1]
Unexamined Japanese Patent Publication No. Hei-4-291644
[Patent Document 2]
Unexamined Japanese Patent Publication No. Hei-4-337666
The above-described usual semiconductor nonvolatile storage device has needed to include an auxiliary memory (SRAM or the like) capable of writing data at high speed to shorten time necessary for writing data from a host device.
As described above, when the auxiliary memory (SRAM or the like) is disposed in an LSI as a semiconductor nonvolatile storage device, the increase of the area of the LSI cannot be avoided. Thus, the cost of the semiconductor nonvolatile storage device has been inconveniently greatly increased.